TEJASWINI SUMANAM

Owned Early Boot Reset IP and co-owned Global Reset for subsystem and SoC resets.

Wrote checkers, monitors, and sequences for reusable Early Boot Reset IP at SoC level.

Supported multi-instance functionality for Early Boot Reset IP at SoC level.

Managed bucketing and resolution of random tests for Early Boot and Global Resets.

Drove chip-level verification for reset and boot flow in Intel Xeon Server Products.

Developed and executed test plans based on senior architects' specifications.

Identified over 20% of bugs in Early Boot Reset IP and Global Reset.

Directed testing of security features across subsystems for 4th Gen Xeon processor.

Drove directed testing for IPs, including cold boot and warm boot processes.

Oversaw partial ownership of reset sequences to enable reusable resets at IP level.