3D Photonic Integrated Circuit Imagers with Embedded 45-degree Reflectors
Conference on Lasers and Electro-Optics (CLEO) May 6, 2024
We design, fabricate, and characterize compact 3D photonic integrated circuits (PICs) based on a multi-layer silicon nitride (Si3N4) platform with embedded 45o reflectors for vertical viewing. The resulting PICs can lead to a wafer-scale imager.
3D Electronic Photonic Integrated Circuits (3D EPICs): Co-Design and Co-Integration for Optimal Performance at Scale
Conference on Lasers and Electro-Optics (CLEO) · May 6, 2024
We discuss the impact of the 3D photonic integrated circuits (PICs), review enabling technologies including optical through-silicon-vias, and cover co-integration and co-design of 3D Electronic-Photonic-Integrated-Circuits (3D EPICs).
Scalable, Low-Loss, High-Precision-Alignment 3D Photonic Interposer Fabricated Using 3D Ultrafast Laser Inscription on Multilayer Silicon Photonics
IEEE Photonics Conference (IPC) · Nov 9, 2025
We designed and fabricated, for the first time, a 3D photonic interposer on a multilayer Si3N4/SiO2/Si photonic platform using high-precision 3D ultrafast-laser-inscription to achieve 0.56 dB coupling losses. The combination of wafer-scale DUV lithography and 3D ULI promises scalable and low-loss 3D photonic integration.
