Summary
Overview
Work History
Education
Skills
Certification
Languages
Timeline
Generic

Parisa Iranian

Montreal,Canada

Summary

Experienced Layout Engineer with over 5 years of international expertise in integrated circuit (IC) layout design and electrostatic discharge (ESD) management, having contributed to complex projects in both Belgium and Canada. Skilled in advanced CAD tools and design methodologies, with a proven history of delivering high-quality layouts on schedule. Bilingual in English and working towards fluency in French, with a strong commitment to advancing the Canadian engineering sector through innovative and efficient design solutions.

Overview

8
8
years of professional experience
1
1
Certification

Work History

Layout Designer

Dolphin Semiconductor
02.2024 - Current
  • Designed and implemented physical layouts for integrated circuits (ICs) based on 22nm process technology both in TSMC and Global Foundries, ensuring optimal area, power, and performance
  • Performed floorplanning and placement of cells, macros, and blocks to optimize chip layout and meet design specifications
  • Applied matching techniques to ensure uniformity and minimize process variations in critical components, such as transistors, capacitors, and resistors
  • Ensured compliance with Design Rule Checks (DRC) and Layout Versus Schematic (LVS), adhering to strict 22nm process node design rules
  • Applied Design for Manufacturability (DFM) principles to improve process compatibility
  • Conducted post-layout verification and simulation, ensuring the absence of design issues

ESD/ LAYOUT ENGINEER

SOFICS (SOLUTIONS FOR ICS)
06.2022 - 09.2023
  • Designed and implemented ESD protection solutions and layouts based on design specifications and guidelines on different technology nodes such as TSMC 18 nm and 22 nm using Tanner tools
  • Worked closely with external customer to address their ESD concerns and provide technical support
  • Performed physical verification checks including DRC and LVS
  • Led interns through their internship period at Sofics to enhance their understanding of ESD principles and practices

CAD SUPPORT ENGINEER

SOFICS (SOLUTIONS FOR ICS)
03.2022 - 09.2023
  • Assisted with the setup and maintenance of design tools including PDK (Physical Design Kit), LVS (Layout Vs Schematic), DRC (Design Rule Check)
  • Worked on: TSMC 55nm, TSMC 28nm, TSMC 22nm, TSMC 12nm

JUNIOR ENGINEER (LAB TECHNISIAN)

SOFICS (SOLUTIONS FOR ICS)
06.2021 - 09.2023
  • Test and verification of on-chip protection circuits for ESD using different testing tools, such as TLP, VFTLP, 2-pin HBM, LPTLP, system level measurement
  • Conducted data analysis and prepared reports on ESD testing results
  • Contributed to the development of testing procedures and protocols to ensure accurate and reliable ESD measurements
  • Troubleshooting of different setups and lab maintenance

Teaching Assistant

Ferdowsi University of Mashhad
09.2016 - 01.2019
  • Physics II
  • Electronics I, II

Internship Student

Power Distribution of Khorasan Razavi
06.2017 - 08.2017
  • Assisting with the implementation and designing PCBs for the ongoing projects using Altium Designer
  • Collecting, analyzing, and interpreting data related to power distribution including voltage level, load profile and equipment performance using Excel and Python

Education

Master of Science - Biomedical Engineering

Vrije University of Brussels (VUB)
09.2021

Master of Science - Biomedical Engineering

Gent University (UGENT)
09.2021

B.Sc. - Electrical Engineering

Ferdowsi University of Mashhad (FUM)
08.2019

Diploma - Mathematics and Physics

Farhiktegan High-School
06.2014

Skills

  • Cadence Tools
  • Tanner/ L-edit
  • Altium Designer
  • Python
  • MATLAB
  • MS Office
  • Latex
  • Linux
  • Semiconductor Physics
  • CMOS
  • LVS
  • DRC
  • ESD testing methodologies and tools
  • Validation methodologies
  • Electrical Engineering Design
  • Communication Skills
  • Adaptability
  • Creative
  • Problem-Solving
  • Layout optimization

Certification

  • EOS/ ESD Association, INC., Fundamental of ESD system level, Basics of ESD and latch-up device physics, ESD/ EDA verification tools, 09/01/22, Reno, Nevada, United States of America
  • ESD – An analog design viewpoint, Udemy
  • PCB design with Altium designer, Udemy

Languages

Persian
English
French
Dutch

Timeline

Layout Designer

Dolphin Semiconductor
02.2024 - Current

ESD/ LAYOUT ENGINEER

SOFICS (SOLUTIONS FOR ICS)
06.2022 - 09.2023

CAD SUPPORT ENGINEER

SOFICS (SOLUTIONS FOR ICS)
03.2022 - 09.2023

JUNIOR ENGINEER (LAB TECHNISIAN)

SOFICS (SOLUTIONS FOR ICS)
06.2021 - 09.2023

Internship Student

Power Distribution of Khorasan Razavi
06.2017 - 08.2017

Teaching Assistant

Ferdowsi University of Mashhad
09.2016 - 01.2019

Master of Science - Biomedical Engineering

Gent University (UGENT)

B.Sc. - Electrical Engineering

Ferdowsi University of Mashhad (FUM)

Diploma - Mathematics and Physics

Farhiktegan High-School

Master of Science - Biomedical Engineering

Vrije University of Brussels (VUB)
Parisa Iranian