Mahaboob Khan Zahir Hussain
Ottawa,ON
Summary
Driven and detail-focused, offering strong analytical skills and keen eye for identifying intricate design issues. Proficient in digital design principles and verification methodologies, with hands-on experience in using industry-standard methodologies such as SystemVerilog and UVM. Committed to ensuring high-quality design verification and contributing to overall success of projects.
Overview
3
3
years of professional experience
Work History
Design Verification Engineer
Accenture
01.2024 - Current
- Authored 50+ directed and constrained-random test cases, achieving 98% functional coverage and improving quality metrics.
- Automated regression execution, coverage analysis, and profiling, reducing manual debug effort by 40%.
- Collaborated with RTL and firmware engineers to diagnose and resolve 30+ design defects using waveform analysis and assertion-based verification.
- Led initiatives to improve testing protocols, reducing turnaround time for project validations.
Verification Engineer Intern
Maven Silicon
01.2023 - 01.2024
- Designed and executed detailed test plans, improving verification coverage and defect detection rates by 25%.
- Partnered with cross-functional teams to triage and resolve over 30 design issues, accelerating project timelines.
- Documented verification results and maintained traceability, enhancing audit readiness and team collaboration.
- Proactively upskilled in emerging verification methodologies and tools, contributing to improved team efficiency
Verification Engineer Intern
Maven Silicon
01.2023 - 01.2024
- Designed and executed detailed test plans, improving verification coverage and defect detection rates by 25%.
- Partnered with cross-functional teams to triage and resolve over 30 design issues, accelerating project timelines.
- Documented verification results and maintained traceability, enhancing audit readiness and team collaboration.
- Proactively upskilled in emerging verification methodologies and tools, contributing to improved team efficiency
Education
MSc - Electrical and Computer Engineering
Lakehead University
Thunder Bay, ON01-2021
BTech - Electronics and Communication Engineering
Hindustan Institute of Science And Technology
India01-2018
Skills
- Verification Methodologies: UVM, Assertion-based Verification, Coverage-driven Verification, Functional coverage
- HDLs & Languages: SystemVerilog, Verilog, C, Python scripting
- Tools & Flows: ModelSim, QuestaSim, Cadence Genus/Innovus, Git, Linux, Makefile automation
- Other Expertise: Simulation profiling, acceleration, RTL design/debug
Timeline
Design Verification Engineer
Accenture
01.2024 - Current
Verification Engineer Intern
Maven Silicon
01.2023 - 01.2024
Verification Engineer Intern
Maven Silicon
01.2023 - 01.2024
MSc - Electrical and Computer Engineering
Lakehead University
BTech - Electronics and Communication Engineering
Hindustan Institute of Science And Technology
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