Summary
Overview
Work History
Education
Timeline
Generic

Eric Siyou Weng

Palo Alto,CA

Summary

Experienced analog design engineer, strong analytical skill, solid foundation in various analog building block, good understanding of system. Great team player always ready for communication.

Overview

28
28
years of professional experience

Work History

Principle Design Engineer

Sighttech, Inc
08.2021 - Current
  • Worked on transferring UMC process based Jitter Attenuator product IP to SMIC process and repurpose it to PCIe clock generator, also designed the HCSL output driver, ring oscillator.
  • Leading the design of RTC with dual I2C interface with current less than 1uA, also leading the same design's transfer from SMIC to TSMC process, designed all the critical low power analog circuits. Latest design efforts is adding TCXO capability into RTC chip. Collaborated with cross-functional teams to ensure the success from engineering designs into final products.

Principle Design Engineer

Diodes, Inc
11.2019 - 08.2021
  • Working on high speed retimer products. Mainly worked on high speed transmitter circuits. Also run the verification of high speed PLL IP from third party.

Principle Engineer

Seyond Inc
12.2018 - 08.2019

Participating the whole signal chain analysis of company LiDAR system. Leading company’s IC effort for LiDAR application. Define the specification for LiDAR SOC, including analog and digital functionalityˎ performance requirement. Interfacing with outside IP vendors and design service providers.

Chief Engineer

Taikeyang Microelectronics
04.2014 - 10.2018

Built and managed an Engineering team to design a series pipeline ADC products. Managed the outsourced projects, working closely with foundry, assembly and testing vendor. Successfully delivered products.

Director Of Analog Design

Goke Inc
11.2011 - 03.2014

Built and managed analog group for Goke, which mainly focused on SOC in satellite receiver application.

  • Coordinated with analog IP vendors with IP assessment, outsourcing projects management,
  • Started design analog IP in house, including bandgap voltage reference, voltage monitor, temperature monitor, PLL.

Staff Design Engineer

Integrated Device Technology Inc
07.2005 - 10.2011

Worked on a variety of CMOS PLL based clock products for consumer electronics application. Also worked on Real Time Clock based on subthreshold voltage CMOS.

Senior Analog Design Engineer

Integrated Circuit Systems
10.1997 - 06.2005

Worked on CMOS PLL prodcuts for timing application, including design, simulation, layout check. Introduced sigma delta modulated fractional PLL technology into company product line. Worked with product Engineers in silicon characterization.

Education

Master of Science - Electrical And Computer Engineer

SUNY Stony Brook
Stony Brook, NY

Master of Science - Electrical Engineering

Institute Of Semiconductors, Chinese Academy Of Sciences
China

Bachelor of Science - Microelectronics

Peking University
Beijng, China

Timeline

Principle Design Engineer

Sighttech, Inc
08.2021 - Current

Principle Design Engineer

Diodes, Inc
11.2019 - 08.2021

Principle Engineer

Seyond Inc
12.2018 - 08.2019

Chief Engineer

Taikeyang Microelectronics
04.2014 - 10.2018

Director Of Analog Design

Goke Inc
11.2011 - 03.2014

Staff Design Engineer

Integrated Device Technology Inc
07.2005 - 10.2011

Senior Analog Design Engineer

Integrated Circuit Systems
10.1997 - 06.2005

Master of Science - Electrical And Computer Engineer

SUNY Stony Brook

Master of Science - Electrical Engineering

Institute Of Semiconductors, Chinese Academy Of Sciences

Bachelor of Science - Microelectronics

Peking University
Eric Siyou Weng