ALFRED ABKARIAN
Glendale,CA
Summary
Offering a broad background and expertise in management, project leadership, system architecture, and high-speed digital design.
Innovative Director of Engineering with 25 years developing and applying new technologies to deliver exceptional final products. Combines technical engineering capability with effective management techniques. Dedicated to driving rapid, advanced product development through meticulous oversight of junior staff and hands-on participation.
Overview
40
40
years of professional experience
1
1
Certification
Work History
Director Of Engineering
Kyocera Corporation / Peerless Systems
07.2003 - Current
- Responsible for managing hardware/firmware group with an annual budget of $3M.
- Responsibilities include:
- Directing all development activities related to hardware intellectual property development for laser printer and Multi-Function Platform (MFP) line of products
- Coordinating system level activities between hardware and software groups both in US and Japan
- Managing all budget related activities including generating annual master plan, labor cost, and capital assets
- Managed several projects meeting all delivery milestones and cost constraints
- Currently planning a 5 year roadmap to meet corporate mandate of 25% annual revenue and market share growth
Co-Founder/President
Janatech Inc.
10.2002 - 12.2003
- Founded Janatech, a technology solutions consulting company, providing design services to the high-tech industry.
Senior Member of Technical Staff, Broadband Access Division
Lucent Technologies
03.2002 - 09.2002
- Defined and architected an Extended Reach remote Terminal (XRT) with high speed ADSL+/VDSL interfaces for Broadcast video and Video-On-Demand (VOD) applications. Architecture included an MPC8255 Motorola Communication processor, Gigabit Ethernet optical interface, and ATM switch/aggregator.
Principal Architect / Principal Member of Technical Staff
Accelerated Networks
06.1997 - 11.2001
- Managed, architected and designed ANI’s DSLAM/Voice Gateway line of products.
- Worked closely with sales and marketing management team to help define and position ANI’s products.
- Managed the Advanced Systems Group with 4 principal architects responsible for defining, and architecting the next generation voice gateway/soft switch product line. Architecture included a 20 slot platform, 40 Gbit protocol agnostic switch fabric, IP switch fabric, TDM switch, and 2.5 Gbit/slot serial link backplane.
- Architected and designed 5 Gbit Utopia 2 backplane, termination, power distribution, and system synchronization and clock distribution schemes.
- Managed product certification process such as NEBS and FCC.
- Co-authored multiple patent applications.
Principal Member of Technical Staff
Ascend Corporation
05.1996 - 06.1997
- Responsible for Pipeline ISDN router line of products.
- Re-designed the Pipeline ISDN product line to improve performance, upgrade technology and reduce cost.
- Redesign included upgrade to Motorola 360 processor, Altera CPLD system controller, multiport Ethernet hub, and voice enhancement circuitry.
- Cost reduction exercise resulted in Millions of dollars in revenue annually.
Sr. Design Engineer
Retix Corporation
01.1993 - 05.1996
- Responsible for local and wide area network Switch / Router designs.
- Designed a 16 port Ethernet switch with DS3/OC3 uplink interface for wide area network applications. Design included i960 processor, AMD Ethernet controllers, Altera system controller and PCI expansion module.
- Architected “Fly-by” DMA transfers doubling data transfer performance.
Sr. Staff Engineer
IEG / Datatape Corp.
10.1990 - 12.1992
- Responsible for system architecture definition and design, software specification, hardware integration, and staff coordination and scheduling.
- Defined and designed system memory architecture and DRAM / Interrupt controller for a 2 Gbyte high-speed memory system at transfer rates of 1Gbit/sec.
- Designed Auxiliary controller using multiple 20,000 gate equivalent ACTEL FPGAs for low rate data/voice processing. Design included A/D and D/A converters, data format encoders and decoders, and DRAM controller.
- Architected auxiliary channel format to synchronize voice/video frames. Defined format to include header/trailer synchronization and error detection and correction coding.
Sr. Design Engineer
Digital Photonics Inc.
05.1990 - 10.1990
- Member of an engineering team developing a SONET OC-3 line terminating fiber optic telecommunication system.
- Designed STS1 / STS3 level overhead processor / timeslot controller. Design aggregated over 2000 subscribers into an OC3 frame and included Selection, Line, and Path overhead byte processor.
Design Engineer
Datatape Corporation
02.1986 - 05.1990
- Member of a project team responsible for developing a new line of high-speed digital data recorders for airborne and laboratory reconnaissance program.
- Designed a user interface PCB utilizing a 68HC11 microcontroller, dual port RAM, and a Bit Address controller ASIC that performed backplane management and interrupt control and vector generation.
- Designed an Ambiguity Zone Detector (AZD) / error corrector ASIC based on maximum likelihood estimation on digitally equalized 1-d2 partial response recording channel.
Education
Master of Arts - Organizational Management And Leadership
Woodbury University
06-2015
Post Graduate Studies - undefined
California State University
Northridge01.1993
BSEE - undefined
California State University
Los Angeles01.1989
Skills
- Hardware development
- Firmware design
- Project management
- Budget management
- System architecture
- Technology roadmapping
- Team leadership
- Intellectual property strategy
- Performance optimization
- Cost reduction strategies
- Embedded systems design
- Technical documentation
- Client engagement
- Stakeholder communication
- Customer engagement
- Project scheduling
- Project planning oversight
- Employee development
- Requirements analysis
- Budget development
- Machine learning
- Budgeting support
- Engineering leadership
- Design oversight
- Team structure management
- Cross-functional team leadership
- Roadmap design
- Innovation management
- Team direction
- Recruiting
- R&D
Accomplishments
- Supervised team of [Number] staff members.
- Collaborated with team of [Number] in the development of [Project name].
Affiliations
Board member, American Youth Soccer Organization
Certification
- Certificate of completion, high performance semi-custom logic array (ASIC) design program, Applied Micro Circuit Corporation.
- Certificate of completion, programmable gate array design program, XILINX Corporation.
Languages
English
Full Professional
Armenian
Native or Bilingual
Persian
Native or Bilingual
Interests
Sports, Music
Timeline
Director Of Engineering
Kyocera Corporation / Peerless Systems
07.2003 - Current
Co-Founder/President
Janatech Inc.
10.2002 - 12.2003
Senior Member of Technical Staff, Broadband Access Division
Lucent Technologies
03.2002 - 09.2002
Principal Architect / Principal Member of Technical Staff
Accelerated Networks
06.1997 - 11.2001
Principal Member of Technical Staff
Ascend Corporation
05.1996 - 06.1997
Sr. Design Engineer
Retix Corporation
01.1993 - 05.1996
Sr. Staff Engineer
IEG / Datatape Corp.
10.1990 - 12.1992
Sr. Design Engineer
Digital Photonics Inc.
05.1990 - 10.1990
Design Engineer
Datatape Corporation
02.1986 - 05.1990
Post Graduate Studies - undefined
California State University
BSEE - undefined
California State University
Master of Arts - Organizational Management And Leadership
Woodbury University
Patent Applications
- Method and Apparatus for synchronization and clock distribution in a network (File # 004100.P002)
- De-coupled timing for high speed bus systems; Expanded address for traffic queuing and prioritization; Method and apparatus to perform cell synchronization in an asynchronous transfer mode network (File # 004100.P001, P004, P006)